SR Latch is the basic and simplest sequential digital circuit. It consists of 2 cross coupled NOR gates as seen in the below figure.
![](https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhEeZdjGYt9ZO10L6s6pHSlpNu2DYZdSJau2wQaS7avL9CC6MvIVr0TD4E_cdqeBdUMpSw4VCody-OHRsSZK0NVzISBpD5gUHEizWw5ithpar6oliu_hMPJ76fr1qm1PDjNHcz8-uBHmE0uFw10Mzy5546gDmGdXShBXkpRop3yHChdfD1a_GrKdkVk7Dv6/w247-h206/SR%20Latch.png)
Unlike in
Cross-Coupled Inverter, in this SR Latch state can be controlled through the inputs S (SET) and R (Reset).
In the case S=0 and R=0, Let's assume previously Q = 0 then now both S=0 and Qprev=0 then Qbar produces output '1' and since now R=0 Q produces output '0'. Now assume previously Q = 1 then now S=0 and Qprev=1 then Qbar produces output '0' and since R=0 Q produces output '1'. It can be observed that in S=0 and R=0 case Q remembers it's prior value i.e., old value. From this it can be inferred that this circuit has memory and it represents the state of the system.
SR Latch is also a bistable element with one bit of state stored in Q similar to the cross coupled inverters but here the state can be controlled with the inputs S and R.